TY  - JOUR 
AU  - Kundu, Parna 
AU  - Das, Himadri Sekhar 
AU  - Banerjee, Sudipta 
AU  - Chaterrjee, Mousam 
AU  - Biswas, Susmita 
AU  - Sharma, Gaurav 
AU  - Chakrabarty, Maitrayee 
AU  - Bhowmik, Aritra 
AU  - Hait, Milan 
AU  - Maity, Subir Kumar 
AU  - Maity, Heranmoy 
PY  - 2025 
T1  - Design and Implementation of Optimized Reversible 9’s and 10’s Complement Code Converter for Applications in Quantum Computing 
JO  - ES General 
SP  - 1792 
EP  -  
VL  - 10 
AB  - In this article, the authors proposed the new cost-optimized reversible 9's and 10's complement code converter for applications in quantum computations using basic reversible gates. The proposed 9’s complement code converter uses one Peres gate (PG) and four reversible NOT gates. The quantum cost (QC), garbage output (GO), constant input (CI), and Delay are 8, 0, 0, and 3 respectively. The new reversible 10's complement code converter uses two PG, one Feynman gate (FG), and three NOT gates. The QC, GO, CI, and Delay of the proposed 10's complement code converter circuit are 12, 1, 1, and 4 respectively. The parameters of the proposed 9's complement are improved significantly. The improvement of QC, GO, CI, and Delay is 61.9% –73.3%, 100%, 100%, and 40% – 50% respectively w.r.t. previously reported results. The proposed circuit has been implemented and verified using the Qiskit by the IBM Quantum Computing lab. The proposed circuits are identical in quantum information processing, cryptography, etc.SN  - 2576-9898 
UR  - http://dx.doi.org/10.30919/g1792 
DO  - 10.30919/g1792 
ID  - g1792